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Semiconductor Design and Verification Services / 半導体設計検証業務

Kōjimachi, Chiyoda City, Tokyo, JapanOn-site or hybridSeniorFULL_TIMEtodayFresh

Job Requirements At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible.

Job Requirements At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.

[業務内容]Key Responsibilities

半導体(インターポーザ、ブリッジチップ、チップレットシステム等)の設計・検証業務を担当していただきます。設計ルールの検証 やレイアウト設計、EDAツールを活用した各種評価業務など、半導体製品の実現を支える重要な業務です。後工程の経験は 必須ではなく、半導体分野での設計・開発・評価・レイアウト設計等の経験を活かして活躍いただけます。 ・Rule fileや検証用レイアウトの妥当性の検討・検証・改善提案 ・Design rule manualに基づいたRule file作成、検証用レイアウト設計 ・Design Manualの内容確認および仕様理解 ・DRC、LVS、ERC、Fill生成における各ルール作成と実行、結果の評価 ・セルライブラリ作成、レイアウト設計 ・EDA実行環境の初期設定、EDAデータの整理・保管、概略仕様の理解、工数の試算 ・報告書・手順書・スクリプトの作成、改善、文書化、設計ユーザからの問い合わせ対応 ・その他、上記に付随する付帯業務

You will be responsible for the design and verification of semiconductors (such as interposers, bridge chips, chiplet systems, etc.). This is an important role that supports the realization of semiconductor products, including verifying design rules, layout design, and various evaluation tasks using EDA tools. Experience in post-processing is not required; you will leverage your experience in design, development, evaluation, and layout design in the semiconductor field. ・Examine, verify, and propose improvements to the validity of rule files and verification layouts ・Creation of rule files based on the Design rule manual, layout design for verification ・Review the contents of the Design Manual and understand the specifications ・Creation and execution of rules for DRC, LVS, ERC, and Fill generation, as well as evaluation of results ・Cell library creation and layout design ・Initial setup of EDA execution environment, organization and storage of EDA data, understanding general specifications, estimating man-hours ・Creation, improvement, documentation of reports, procedures, and scripts, and handling inquiries from design users ・Other ancillary services related to the above

[ポジションの魅力] Attractive Points of the position

• 国家的に重要な半導体イニシアチブへの参画 • 顧客ポータルプロジェクトに取り組みながら、専門知識を深める • 急成長する組織でスキルを向上させる

• Envolve in nationally significant semiconductor Initiative • Expand your expertise while working on customer portal projects • Improve skills in a rapidly growing organization

We are known for our extraordinary people who make the impossible possible every day. Questians are driven by hunger, humility, and aspiration. We believe that our company culture is the key to our ability to make a true difference in every industry we reach. Our teams regularly invest time and dedicated effort into internal culture work, ensuring that all voices are heard.

We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.

Work Experience [応募条件] Requirements 

■必須要件■ Must Have ※経験年数 : 5 年程度 • ・DRCまたはERC(LSI、インターポーザのいずれか) • ・Design rule manualの内容を理解できる方 • ・PegasusまたはIC Validatorのツールコーディング(PVLやPXL)の内容を理解できる方 • ・Ruleの妥当性を検証するためのレイアウトを設計できる方 • ・Pegasus/PVSまたはIC Validatorオペレーション • ・レイアウトツールオペレーション(Virtuoso, DESIGNrev, 3DIC Compiler, APD/Allegroのいずれ か) • ・コミュニケーション能力 (他チームとの連携) • Excel: MS Office利用経験 • その他: ・Linux利用経験 ・ドキュメント作成 (手順書、報告書)

• Required years of experience – 5 years • DRC or ERC (either LSI or interposer) • Able to understand the contents of the Design rule manual • Ability to understand tool coding (PVL or PXL) for Pegasus or IC Validator • Able to design layouts to verify the validity of rules • Pegasus/PVS or IC Validator operations • Layout tool operation (Virtuoso, DESIGNrev, 3DIC Compiler, APD/Allegro) • Communication skills (collaboration with other teams) • Excel: Experience using MS Office • Other: ・Experience using Linux ・Document creation (procedures, reports)

 ■尚可要件■ Good to Have • ・Shell、Python、tcl等によるスクリプト作成 • ・Calibreツールコーディング • ・ADKまたはPDK開発 • ・Design rule、Rule codeおよび検証用レイアウトを相互比較し、改善策を提案できる • ・Calibreのツールオペレーション • ・DRC、ERC、LVS、Fill

• ・Script creation using Shell, Python, tcl, etc. • ・Calibre tool coding • ・ADK or PDK development • ・Ability to compare design rules, rule code, and verification layouts with each other and propose improvement measures • ・Calibre tool operation • ・DRC, ERC, LVS, Fill

 ■語学力■ Language Skill • 英語: EDAツールマニュアルなどのドキュメントを読んで内 容が理解できる (翻訳ソフトなど併用可能) • 日本語‐ JLPT N2 以上

• English : Able to read and understand documents such as EDA tool manuals (translation software can be used in combination) • Japanese – JLPT N2 or above

[待遇・福利厚生]

◆昇給年1回 ※契約社員は更新のタイミングで見直しあり

◆通勤手当(上限2万円/月)

◆給与詳細:完全年俸制(1/12を毎月支給)

◆残業手当 

◆各種社会保険完備

・ 厚生年金

・ 健康保険(TJK : 東京都情報サービス産業健康保険組合)

・ 雇用保険

・ 労働者災害補償保険

◆健康診断(被扶養者健康診断、人間ドック、婦人科健診など) 

◆65歳定年制 ※役職定年なし

◆社内研修制度(オンライン)

◆試用期間3ヶ月、業務・待遇変更なし

◆受動喫煙防止対策:あり(屋内禁煙)

[Welfare]

◆ Salary increment once a year

◆ Commuting allowance (up to 20,000/month)

◆ Salary details: Full annual salary system (1/12 paid monthly)

◆ Overtime allowance

◆ Equipped with various social insurance

・ Welfare pension

・ Health insurance (Tokyo Information Service Industry Health Insurance Association)

・ Employment insurance

・ Worker's Accident Compensation Insurance

◆ Health checkup (health checkup for dependents, medical checkup, gynecological checkup, etc.)

◆ Retirement age is 65 years old *No retirement age for positions

◆ Referral recruitment system (with benefits)

◆ In-house training system (online)

◆ Trial period: 3 months, no change in duties or benefits

◆ Measures to prevent passive smoking: Yes (no smoking indoors)

[休日休暇]

◆年間休日120日以上

◆完全週休2日制(土・日)

◆祝日

◆年末年始休暇

◆有給休暇

◆産前産後休暇

◆育児休暇

◆介護休暇

◆忌引休暇 

※常駐先の業務にともなって休日・休暇は変動の可能性があります。すべて大手メーカーのため、年次休暇などは充実している場合がほとんどです。

[Vacations]

◆ Total holidays: over 120 days off per year

◆ 2-day weekend system (Saturday and Sunday)

◆ National Holidays

◆ New Year holidays

◆ Paid vacation

◆ Prenatal and post-natal leave

◆ Childcare leave

◆ Nursing care leave

◆ Bereavement leave

*Holidays and vacation days may change depending on the work place you are stationed. Since they are all major manufacturers, most have generous annual vacations

Frequently asked

Is this Semiconductor Design and Verification Services / 半導体設計検証業務 role remote?

This role is based in Kōjimachi, Chiyoda City, Tokyo, Japan.

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